US 12,224,122 B2
Electronic component, circuit board, and method of mounting electronic component on circuit board
Eiji Teraoka, Nagaokakyo (JP); and Hirokazu Takashima, Nagaokakyo (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Nagaokakyo (JP)
Filed on Oct. 13, 2023, as Appl. No. 18/379,687.
Application 18/379,687 is a continuation of application No. 18/098,786, filed on Jan. 19, 2023, granted, now 11,817,263.
Application 18/098,786 is a continuation of application No. 17/544,992, filed on Dec. 8, 2021, granted, now 11,587,731, issued on Feb. 21, 2023.
Application 17/544,992 is a continuation of application No. 16/581,847, filed on Sep. 25, 2019, granted, now 11,232,907, issued on Jan. 25, 2022.
Claims priority of application No. 2018-189163 (JP), filed on Oct. 4, 2018.
Prior Publication US 2024/0055185 A1, Feb. 15, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01G 4/12 (2006.01); H01G 4/012 (2006.01); H01G 4/228 (2006.01); H01G 4/30 (2006.01)
CPC H01G 4/12 (2013.01) [H01G 4/012 (2013.01); H01G 4/228 (2013.01); H01G 4/30 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic component, comprising:
a laminate including an inner layer portion including first internal electrodes and second internal electrodes that are alternately laminated in a lamination direction with dielectric layers interposed between the first internal electrodes and the second internal electrodes, and outer layer portions that sandwich the inner layer portion in the lamination direction, the laminate further including:
a first main surface and a second main surface opposite to each other in the lamination direction;
a first side surface and a second side surface opposite to each other in a width direction orthogonal or substantially orthogonal to the lamination direction; and
a first end surface and a second end surface opposite to each other in a length direction orthogonal or substantially orthogonal to the lamination direction and the width direction;
a first external electrode provided on at least the first end surface of the laminate and electrically connected to the first internal electrodes; and
a second external electrode provided on at least the second end surface of the laminate and electrically connected to the second internal electrodes; wherein
when a cross section including the length direction and the width direction of the laminate is viewed from the lamination direction, side margin portions each include a dielectric including Ca, Zr, and Ti, each of the side margin portions being a region in which none of the first internal electrodes and the second internal electrodes are disposed;
each of the side margin portions includes a first portion and a second portion, and the first portion of the side margin portion is closer to the first and second internal electrodes than the second portion of the side margin portion in the width direction;
each of the side margin portions includes Si, and a molar ratio of Si/Ti in the second portion is higher than a molar ratio of Si/Ti in the first portion; and
the dielectric layers include a different dielectric composition from that of the side margin portions.