US 12,224,115 B2
Circuit device and solenoid control device
Kei Ishimaru, Chino (JP); and Yoshihiko Nimura, Hara (JP)
Assigned to SEIKO EPSON CORPORATION, (JP)
Filed by SEIKO EPSON CORPORATION, Tokyo (JP)
Filed on Feb. 17, 2023, as Appl. No. 18/170,915.
Claims priority of application No. 2022-023366 (JP), filed on Feb. 18, 2022; application No. 2022-023367 (JP), filed on Feb. 18, 2022; and application No. 2022-023368 (JP), filed on Feb. 18, 2022.
Prior Publication US 2023/0268109 A1, Aug. 24, 2023
Int. Cl. H01F 7/06 (2006.01); H03F 3/45 (2006.01); H03K 19/0175 (2006.01)
CPC H01F 7/064 (2013.01) [H03F 3/45475 (2013.01); H03K 19/017509 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A circuit device comprising:
a current sense amplifier circuit configured to detect a current flowing through a shunt resistor among a switching element, the shunt resistor and an inductor coupled in series between a first power supply node and a second power supply node; and
a processing circuit configured to obtain, based on an output of the current sense amplifier circuit, a corrected current value of the current flowing through the shunt resistor, wherein
the current sense amplifier circuit includes
an operational amplifier,
a first resistor provided between a first resistor node at one end of the shunt resistor and a first node,
a first switch provided between the first node and a first input node of the operational amplifier,
a second resistor provided between a second resistor node at another end of the shunt resistor and a second node,
a second switch provided between the second node and a second input node of the operational amplifier,
a third resistor provided between a constant voltage node and a third node,
a third switch provided between the third node and the first input node of the operational amplifier,
a fourth resistor provided between the constant voltage node and a fourth node, and
a fourth switch provided between the fourth node and the second input node of the operational amplifier,
in a current detection period, the first switch and the second switch are turned on, the third switch and the fourth switch are turned off, and the processing circuit acquires a detected current value based on the output of the current sense amplifier circuit,
in an offset detection period, the first switch and the second switch are turned off, the third switch and the fourth switch are turned on, and the processing circuit acquires an offset value based on the output of the current sense amplifier circuit, and
the processing circuit obtains the corrected current value based on the detected current value and the offset value.