US 12,224,038 B2
Memory device and intelligent operation method thereof
Kuan-Chih Chen, New Taipei (TW); Chia-Hong Lee, Taoyuan (TW); and Ming-Hsiu Lee, Hsinchu (TW)
Assigned to MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed by MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed on Mar. 29, 2023, as Appl. No. 18/191,903.
Prior Publication US 2024/0331747 A1, Oct. 3, 2024
Int. Cl. G11C 11/409 (2006.01); G11C 7/10 (2006.01); G11C 11/54 (2006.01)
CPC G11C 7/109 (2013.01) [G11C 7/1012 (2013.01); G11C 11/54 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory array;
a signal generating circuit, configured to generate an inputting signal;
an environment detecting circuit, configured to detect at least one environment information; and
an artificial intelligence (AI) circuit, connected among the memory array, the signal generating circuit and the environment detecting circuit, wherein the AI circuit at least receives the inputting signal from the signal generating circuit, receives the environment information from the environment detecting circuit, receives a first performance information from the memory array, receives a second performance information from the AI circuit and outputs an ideal signal to the memory array according to the inputting signal, the environment information, the first performance information and the second performance information.