US 12,224,031 B2
Semiconductor memory device
Jung Dal Choi, Hwaseong-si (KR); Jung Shik Jang, Icheon-si (KR); Jin Kook Kim, Seongnam-si (KR); Dong Sun Sheen, Seongnam-si (KR); Se Young Oh, Seoul (KR); Ki Hong Lee, Suwon-si (KR); Dong Hun Lee, Icheon-si (KR); Sung Hoon Lee, Icheon-si (KR); and Sung Yong Chung, Seongnam-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 29, 2022, as Appl. No. 18/071,118.
Application 18/071,118 is a continuation of application No. 16/683,027, filed on Nov. 13, 2019, granted, now 11,545,190.
Claims priority of application No. 10-2019-0087832 (KR), filed on Jul. 19, 2019.
Prior Publication US 2023/0093329 A1, Mar. 23, 2023
Int. Cl. H10B 43/30 (2023.01); G11C 5/06 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01)
CPC G11C 5/063 (2013.01) [H10B 43/27 (2023.02); H10B 43/30 (2023.02); H10B 43/35 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
conductive patterns stacked apart from each other in a vertical direction, each of the conductive patterns including a first portion, a second portion spaced apart from the first portion and a third portion connecting the first portion and the second portion;
a hole passing through the conductive patterns, the hole including a sidewall surrounded by the first portion, the second portion and the third portion of each of the conducive patterns;
a first channel pattern disposed within the hole and adjacent to the first portion of each of the conducive patterns;
a second channel pattern disposed within the hole and adjacent to the second portion of each of the conducive patterns;
a single bit line connected to the first channel pattern and the second channel pattern; and
a channel separation pattern disposed within the hole and between the first channel pattern and the second channel pattern,
wherein each of the conductive patterns extends continuously from the first portion to the second portion without being separated by the channel separation pattern, and
wherein the first channel pattern and the second channel pattern are separated from each other by the channel separation pattern.