US 12,224,011 B2
Non-volatile memory with concurrent sub-block programming
Ke Zhang, Shanghai (CN); Liang Li, Shanghai (CN); and Jiahui Yuan, Fremont, CA (US)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US)
Filed on Apr. 22, 2022, as Appl. No. 17/726,923.
Prior Publication US 2023/0343395 A1, Oct. 26, 2023
Int. Cl. G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/12 (2006.01)
CPC G11C 16/08 (2013.01) [G11C 16/107 (2013.01); G11C 16/12 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A non-volatile storage apparatus, comprising:
multiple planes of non-volatile memory cells, each plane comprises word lines and blocks of non-volatile memory cells, each block comprises sub-blocks including an upper sub-block and a lower sub-block, the word lines are grouped into predetermined pairs of corresponding word lines such that a predetermined pair of corresponding word lines comprises a word line of a lower sub-block and a word line of an upper sub-block, each predetermined pair of corresponding word lines is assigned a predetermined offset, each of the blocks comprises a plurality of vertical columns that are intersected by the word lines, the vertical columns have diameters that increase from bottom of the vertical columns to top of the vertical columns within the sub-blocks; and
one or more control circuits connected to the multiple planes, the one or more control circuits are configured to concurrently program memory cells connected to a first predetermined pair of corresponding word lines including memory cells connected to a first word line in a lower sub-block of a first block of a first plane and memory cells connected to a second word line in an upper sub-block of a second block of a second plane using a common programming voltage signal concurrently applied to the first word line intersecting vertical columns at a first range of one or more column diameters and the second word line intersecting vertical columns at a second range of one or more column diameters, the first range of one or more column diameters is different than and disjoint from the second range of one or more column diameters, the common programming voltage signal comprises a standard programming voltage signal modified by a first predetermined offset assigned to the first predetermined pair of corresponding word lines.