US 12,224,008 B2
Non-volatile static random access memory
Darsen Duane Lu, Tainan (TW); Mohammed Aftab Baig, Tainan (TW); Siao-Shan Huang, Tainan (TW); and Fu Yuan Chang, Tainan (TW)
Assigned to NATIONAL CHENG KUNG UNIVERSITY, Tainan (TW)
Filed by NATIONAL CHENG KUNG UNIVERSITY, Tainan (TW)
Filed on Dec. 22, 2022, as Appl. No. 18/087,279.
Claims priority of application No. 111144382 (TW), filed on Nov. 21, 2022.
Prior Publication US 2024/0170062 A1, May 23, 2024
Int. Cl. G11C 11/22 (2006.01); G06F 3/06 (2006.01); G11C 14/00 (2006.01)
CPC G11C 14/0072 (2013.01) [G06F 3/0613 (2013.01); G06F 3/0625 (2013.01); G06F 3/0629 (2013.01); G06F 3/0673 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A non-volatile static random access memory, comprising:
a static random access memory comprising a first inverter, a second inverter and two transistors, an output terminal of the first inverter and an input terminal of the second inverter are electrically connected to each other to serve as a Q node, an input terminal of the first inverter and an output terminal of the second inverter are electrically connected to each other to serve as a QB node, and the two transistors are electrically connected to the Q node and the QB node, respectively;
a reading element electrically connected to the Q node, wherein the reading element comprises a first reading transistor and a second reading transistor, a gate electrode of the first reading transistor is electrically connected to the Q node, a source electrode of the second reading transistor is electrically connected to a drain electrode of the first reading transistor, a gate electrode of the second reading transistor is electrically connected to a read word line, and a drain electrode of the second reading transistor is electrically connected to a read bit line; and
a first embedded non-volatile memory electrically connected to the QB node.