US 12,223,994 B2
Memory arrays, ferroelectric transistors, and methods of reading and writing relative to memory cells of memory arrays
Durai Vishak Nirmal Ramaswamy, Boise, ID (US); and Wayne Kinney, Emmett, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 15, 2024, as Appl. No. 18/606,333.
Application 18/606,333 is a division of application No. 17/589,603, filed on Jan. 31, 2022, granted, now 11,955,156.
Application 17/589,603 is a division of application No. 16/838,585, filed on Apr. 2, 2020, granted, now 11,276,449, issued on Mar. 15, 2022.
Application 16/838,585 is a division of application No. 15/134,221, filed on Apr. 20, 2016, granted, now 10,636,471, issued on Apr. 28, 2020.
Prior Publication US 2024/0265960 A1, Aug. 8, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/22 (2006.01); H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/788 (2006.01); H10B 51/30 (2023.01); H10B 53/30 (2023.01)
CPC G11C 11/2275 (2013.01) [G11C 11/223 (2013.01); G11C 11/2273 (2013.01); H01L 29/40111 (2019.08); H01L 29/78391 (2014.09); H01L 29/7881 (2013.01); H10B 51/30 (2023.02); H10B 53/30 (2023.02); G11C 11/2257 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A method of forming a ferroelectric transistor, comprising:
forming gate dielectric material configured as a first container, the first container having a first opening extending into the dielectric material and being defined by a first inner bottom surface and a first inner sidewall surface extending orthogonally relative to the first inner bottom surface;
forming a metal-containing material configured as a second container nested within said first opening, the second container having a second opening extending into the metal containing material and being defined by a second inner bottom surface with an area less than the first inner surface and having a second inner sidewall surface extending orthogonally relative to the second inner;
forming a ferroelectric material configured as a third container nested within the second opening, the third container having a third inner bottom surface with an area less than the second inner surface and having a third inner sidewall surface extending orthogonally relative to the third inner bottom surface;
forming a gate material within the third container, wherein a common sidewall surface extends orthogonally relative to the first, second and third inner bottom surfaces; and
forming an insulative sidewall spacer material along the common sidewall surface in direct physical contact with each of the metal-containing material, the gate dielectric material, the ferroelectric material and the gate material.