| CPC G06F 9/30036 (2013.01) [G06F 9/3001 (2013.01); G06F 9/30065 (2013.01)] | 14 Claims |

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1. An apparatus comprising:
a microprocessor embedded in a programmable logic device (PLD), the microprocessor including a logic unit having a vector processor block (VPB) that includes one or more of an arithmetic logic unit (ALU) or a floating point unit (FPU), the logic unit operable in two modes, which comprise:
a general purpose mode running at least one general purpose process related to the PLD; and
a fixed function mode emulating a fixed function for use by logic configured into a fabric of the PLD (fabric), emulated fixed function computed using data streamed in from the fabric, wherein the microprocessor is synchronized with the fabric;
a memory unit coupled to the logic unit and to the fabric, wherein the fabric is operable for transferring signals with the logic unit in relation to the fixed function, and
a cache disposed in or coupled to the ALU or FPU, the cache comprising a kernel stored therewith and operable in relation to the emulated fixed function, the kernel including code relating to an infinite loop program stored in the cache, the start of the infinite loop program triggered by the fabric.
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