US 12,223,290 B2
Decimal floating-point instruction in a round-for-reround mode
Eric Mark Schwarz, Gardiner, NY (US); and Martin Stanley Schmookler, Austin, TX (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Jun. 21, 2023, as Appl. No. 18/338,901.
Application 18/338,901 is a continuation of application No. 17/026,407, filed on Sep. 21, 2020, granted, now 11,698,772.
Application 17/026,407 is a continuation of application No. 16/550,257, filed on Aug. 25, 2019, granted, now 10,782,932, issued on Sep. 22, 2020.
Application 16/550,257 is a continuation of application No. 16/185,028, filed on Nov. 9, 2018, granted, now 10,423,388, issued on Sep. 24, 2019.
Application 16/185,028 is a continuation of application No. 15/852,180, filed on Dec. 22, 2017, granted, now 10,127,014, issued on Nov. 13, 2018.
Application 15/852,180 is a continuation of application No. 15/470,692, filed on Mar. 27, 2017, granted, now 9,851,946, issued on Dec. 26, 2017.
Application 15/470,692 is a continuation of application No. 14/943,254, filed on Nov. 17, 2015, granted, now 9,690,544, issued on Jun. 27, 2017.
Application 14/943,254 is a continuation of application No. 13/848,885, filed on Mar. 22, 2013, granted, now 9,201,846, issued on Dec. 1, 2015.
Application 13/848,885 is a continuation of application No. 11/680,894, filed on Mar. 1, 2007, granted, now 8,443,029, issued on May 14, 2013.
Prior Publication US 2023/0342112 A1, Oct. 26, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 7/499 (2006.01); G06F 7/38 (2006.01); G06F 7/483 (2006.01); G06F 7/491 (2006.01); G06F 9/30 (2018.01); G06F 17/10 (2006.01)
CPC G06F 7/49957 (2013.01) [G06F 7/386 (2013.01); G06F 7/483 (2013.01); G06F 7/491 (2013.01); G06F 7/49915 (2013.01); G06F 7/49963 (2013.01); G06F 7/49968 (2013.01); G06F 7/49973 (2013.01); G06F 7/49978 (2013.01); G06F 7/49984 (2013.01); G06F 9/30014 (2013.01); G06F 17/10 (2013.01); G06F 7/49947 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising:
executing, by a computer processor of the computing environment, a decimal floating-point instruction in a round-for-reround mode, wherein the computer processor is part of a machine that includes one or more floating point registers and wherein the decimal floating-point instruction is configured to perform a decimal floating-point operation on a decimal floating-point operand, the executing the decimal floating-point instruction comprising:
forming, by the computer processor, based on performing the decimal floating-point operation, an intermediate result having a high order portion and a low order portion, the high order portion having a least significant digit;
creating from the intermediate result a rounded-for-reround number, the rounded-for-reround number comprising the high order portion of the intermediate result, and wherein based on the least significant digit of the high order portion being a selected value and based on the low order portion having another selected value, incrementing the least significant digit of the rounded-for-reround number; and
storing in a selected location, by the computer processor, the rounded-for-reround number.