US 12,223,203 B2
Memory system and control method
Akiyuki Kaneko, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 1, 2023, as Appl. No. 18/459,979.
Claims priority of application No. 2022-189156 (JP), filed on Nov. 28, 2022.
Prior Publication US 2024/0176537 A1, May 30, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0658 (2013.01) [G06F 3/0656 (2013.01); G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a nonvolatile memory; and
a memory controller including:
a host interface configured to communicate with a host in accordance with a first interface protocol, according to which write data is communicated in units of a sector having a first size;
a memory interface configured to communicate with the nonvolatile memory in accordance with a second interface protocol, write data is communicated in units of a second size greater than the first size; and
a write buffer configured to temporarily store data of a third size in each of a plurality of entries thereof, the third size being equal to the second size or 1/N of the second size, N being a natural number, each of the entries being reserved to store data of a plurality of sectors that are associated with a continuous logical address range, each of the plurality of sectors having the first size, wherein
the memory controller is configured to:
select one of the entries in which write data is to be stored;
determine whether the selected entry is missing data of any sector;
in response to determining that the selected entry is missing data of at least one sector, perform a host inquiry by transmitting a request to the host for the missing data via the host interface;
in response to receiving the missing data from the host via the host interface, store the missing data in the selected entry; and
when the selected entry is not missing data from any of the sectors, perform a write operation to store the data of the third size in the selected entry into the nonvolatile memory at a continuous physical address range thereof.