CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0689 (2013.01)] | 20 Claims |
11. An apparatus for programming data into flash memory, comprising:
a static random access memory (SRAM), arranged operably to: store operating settings of a virtual carrier;
a controller, coupled to the SRAM, arranged operably to: read the operating settings of the virtual carrier from the SRAM; set a redundant array of independent disks (RAID) engine according to a mid-end parameter set stored in the SRAM for driving the RAID engine to complete a designated encryption or encoding operation on first data associated with the virtual carrier when the operation settings indicate that the first data associated with the virtual carrier need to go through a mid-end processing stage; determine whether second data associated with the virtual carrier need to go through a back-end processing stage according to the operation settings when the operation settings indicate that the first data associated with the virtual carrier do not need to go through the mid-end processing stage, or the first data associated with the virtual carrier have gone through the mid-end processing stage; and send a programming index to a data access engine according to a back-end parameter set stored in the SRAM for driving the data access engine to read a programming table from the SRAM according to the programming index, and program the second data associated with the virtual carrier into a designated address in a flash module according to content of the programming table when the operation settings indicate that the second data associated with the virtual carrier need to go through the back-end processing stage.
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