| CPC G06F 3/0619 (2013.01) [G06F 3/0652 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |

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1. An operating method of a memory chip comprising steps of:
constructing the memory chip comprising at least two groups of nonvolatile registers, wherein each group of the nonvolatile registers comprises a flag register and at least one data register, and stored data of each of flag registers is configured to indicate at least one storage state of the at least one data register in a same group of the nonvolatile registers;
obtaining the stored data of at least one of the flag registers;
judging whether the stored data of the at least one of the flag registers is random code, wherein the random code are data being non-0x00 and being non-0xFF, wherein 0x00 represents binary data of 00000000, 0xFF represents binary data of 11111111, the non-0x00 represents binary data other than 00000000, and the non-0xFF represents binary data other than 11111111; and
erasing all of the nonvolatile registers in response to the stored data of the at least one of the flag registers being the random code;
wherein the step of obtaining the stored data of the at least one of the flag registers further comprises a step of: reading the stored data of the flag registers from a first group of the nonvolatile registers to a last group of the nonvolatile registers according to an address sequence; and
wherein the step of judging whether the stored data of the at least one of the flag registers is the random code further comprises steps of:
judging whether the stored data of the flag register in a current group of the nonvolatile registers is 0x00;
judging whether the stored data of the flag register in the current group of the nonvolatile registers is 0xFF, in response to the stored data of the flag register in the current group of the nonvolatile registers being non-0x00; and
the step of erasing all of the nonvolatile registers of the stored data of the at least one of the flag registers is the random code further comprises steps of: recording the stored data of the at least one data register in the last group of the nonvolatile registers that is in a non-writable state to a buffer, and erasing all of the nonvolatile registers, in response to the stored data of the flag register in the current group of the nonvolatile registers being non-0xFF.
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