| CPC G06F 3/0619 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
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1. An information processing apparatus connectable to a memory system, the information processing apparatus comprising:
a nonvolatile memory; and
a processor configured to:
store first data to the nonvolatile memory;
store first management data to the nonvolatile memory, the first management data including information equivalent to a first write command that is associated with the first data and designates a first logical address range;
perform a first transmission of the first write command to the memory system;
upon receiving, from the memory system, a first response to the first write command transmitted in the first transmission, add, to the first management data, information indicating that the first response to the first write command transmitted in the first transmission has been received; and
upon receiving, from the memory system, a second response to the first write command after receiving the first response, delete the first data and the first management data from the nonvolatile memory, wherein
the processor is further configured to:
when either a write operation of second data to a second logical address range or deallocation of the second logical address range is requested before the second response to the first write command is received,
wait to receive the first response to the first write command, and
after receiving the first response to the first write command, transmit, to the memory system, a command to cancel a write operation to at least a third logical address range from a write operation of the first data to the first logical address range in accordance with the first write command, the second logical address range including the third logical address range, the third logical address range being at least a portion of the first logical address range; and
when the cancel of the write operation to the third logical address range is successful, update or delete the first management data.
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