CPC G06F 3/0446 (2019.05) [G06F 2203/04111 (2013.01)] | 15 Claims |
1. A circuit carrier, comprising:
a substrate having a die-bonding region and a peripheral region that surrounds the die-bonding region, wherein outer surfaces of the substrate include a layout surface and a carrying surface that is opposite to the layout surface;
a capacitive electrode layer formed on the layout surface and including:
a plurality of first electrodes arranged in multiple columns each parallel to a first direction; and
a plurality of second electrodes arranged in multiple rows each parallel to a second direction, wherein one of the rows does not pass through the die-bonding region and is defined as a first row, and the second electrodes of the first row are connected along the second direction, wherein another one of the rows passes through the die-bonding region and is defined as a second row,
wherein at least one of the second electrodes of the second row is arranged on the die-bonding region is defined as at least one second layout electrode, and the second electrodes of the second row arranged on the peripheral region have two groups spaced apart from and respectively located at two opposite sides of the at least one second layout electrode along the second direction, and wherein the second electrodes of each of the two groups are connected along the second direction; and
a conductive structure formed on the peripheral region, wherein the second electrodes of each of the two groups are electrically coupled to the at least one second layout electrode through the conductive structure.
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