US 12,223,099 B2
Unused redundant enable disturb protection circuit
Seth A. Eichmeyer, Boise, ID (US); Christopher G. Wieduwilt, Boise, ID (US); and Matthew D. Jenkinson, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 28, 2022, as Appl. No. 17/706,410.
Prior Publication US 2023/0315918 A1, Oct. 5, 2023
Int. Cl. G11C 29/08 (2006.01); G06F 21/79 (2013.01); H03K 19/20 (2006.01)
CPC G06F 21/79 (2013.01) [G11C 29/08 (2013.01); H03K 19/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a plurality of fuse banks for a memory region, each fuse bank storing bit information that relates to at least one of a default address for the plurality of fuse banks or an address of a memory cell that is defective; and
a default address protection circuit configured to provide a default address status signal indicating whether a fuse bank in the plurality of fuse banks is storing bit information that corresponds to both the default address and an address of a memory cell that is defective.