US 12,222,870 B2
Method and apparatus for performing mapping table management of memory device in predetermined communications architecture with aid of table analysis
Jie-Hao Lee, Hsinchu County (TW); and Chun-Ju Chen, Taichung (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on Mar. 2, 2023, as Appl. No. 18/116,311.
Prior Publication US 2024/0296126 A1, Sep. 5, 2024
Int. Cl. G06F 12/1009 (2016.01); G06F 12/02 (2006.01)
CPC G06F 12/1009 (2013.01) [G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7203 (2013.01); G06F 2212/7205 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method for performing mapping table management of a memory device in a predetermined communications architecture with aid of table analysis, the method being applied to a memory controller of the memory device, the memory device comprising the memory controller and a non-volatile (NV) memory, the NV memory comprising at least one NV memory element, the at least one NV memory element comprising a plurality of blocks, the method comprising:
utilizing the memory controller to receive a first command from a host device through a transmission interface circuit of the memory controller, wherein the first command indicates that first partial storage space corresponding to a first logical address range will not be used by the host device, the first command carries first information related to the first logical address range, and the first information comprises at least one first beginning logical address and a first length for indicating the first logical address range; and
in response to the first command, loading a local logical-to-physical (L2P) address mapping table from the NV memory into a volatile memory within the memory controller to be a temporary L2P address mapping table, determining a first entry group as addresses within the first logical address range starting from the first logical address and corresponding to a first physical block, setting a next sequential L2P table entry in the temporary L2P address mapping table after the first entry group as a second logical address, determining a second entry group as addresses within the first logical address range starting from the second logical address and corresponding to a second physical block, changing multiple L2P table entries in the temporary L2P address mapping table to be multiple updated L2P table entries in a group-by-group manner corresponding to the first entry group and the second entry group, rather than an entry-by-entry manner, and updating the local L2P address mapping table in the NV memory according to the multiple updated L2P table entries of the temporary L2P address mapping table corresponding to the first entry group and the second entry group, for unmapping at least one portion of pages among all pages of at least one block of the plurality of blocks, wherein the first partial storage space comprises the at least one portion of pages.