| CPC G06F 12/0253 (2013.01) [G06F 11/1458 (2013.01); G06F 2212/702 (2013.01)] | 18 Claims |

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1. A device-implemented method for optimized computation and data management comprising:
invoking first transistor-based circuitry configured to obtain one or more user instructions that cause a first graph state to be configured that represents one or more computations as one or more computation nodes and data as one or more data nodes;
invoking second transistor-based circuitry configured to identify a first computation node of said one or more computation nodes that represents a corresponding one of the one or more computations that is ready to be performed at least by virtue of all input thereof being populated;
invoking third transistor-based circuitry configured to populate a first data node of the one or more data nodes that references said first computation node by causing a first computation that corresponds to said first computation node to be performed immediately in response to said identifying wherein said populating said first data node includes causing a reference to said first computation node to become removed so that said first computation node is not referenced by the first data node;
invoking fourth transistor-based circuitry configured to perform at least some garbage collection upon said first computation node and all input thereof based on detecting that said first computation node is no longer referenced by providing effective cancellation of running calculations that are no longer represented by existing computation nodes in the first graph state so as to configure a new version of the first graph state that includes already running calculations that are needed and so that one or more running calculations that are not in the new version are interrupted, and protecting said first data node that references said first computation node from being removed so as to ensure that said first computation node temporarily remains available for reuse for a specified period of time even without being referenced by any other node so as to eliminate a need to re-run one or more computations represented in said first computation node and thereafter removing said first computation node as a component of said garbage collection; and
automatically applying one or more node lifecycle rules by invoking fifth transistor-based circuitry configured to mitigate redundant processing in response to one or more invoked instructions of a first component of a subgraph or of a node by comparing said first component with a prior second component and obtaining a preexisting or other result of said prior second component in lieu of regenerating said result of said prior second component wherein the one or more node lifecycle rules are applied by (1) dynamically manipulating a database state of a system that includes the first computation node and (2) translating said one or more user instructions and data into said one or more computation nodes and said data and (3) causing one or more external units to perform said corresponding one of said one or more computations that is ready to be performed.
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