| CPC G06F 11/1441 (2013.01) [G06F 11/0724 (2013.01); G06F 11/0739 (2013.01)] | 13 Claims |

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1. A method for controlling a technical system, the method comprising:
resetting at least one hardware component of a device, wherein a) the device includes a plurality of cores and the resetting includes a resetting of a single core of the plurality of cores, such that the resetting of the single core does not influence one or more further cores of the plurality of cores, and/or b) a resetting of modules of the device and/or of any existing external circuits is carried out such that several independent applications can be operated and the several independent applications do not influence one another;
wherein the method includes at least one of the following features (i)-(ii):
(i) the method is used for at least one of the following:
(a) enabling a deterministic runtime behavior of at least some applications of the device; and
(b) avoiding a new homologation for one application when changing at least one further application; and
(ii) the method further comprises at least one of the following steps:
(a) forwarding information characterizing an operating state with regard to a functional safety of an application to at least one further unit, the at least one further unit being a unit arranged externally to the device;
(b) at least temporarily separating partitions or applications from one another using a quality of service and/or at least one parameter characterizing the quality of service, wherein at least one application sets the quality of service, the quality of service being characterizable by latency and/or bandwidth for at least one peripheral component;
(c) securing a deterministic data exchange between a plurality of applications running on a computer or the device using a memory region assignment implemented using at least one memory protection unit; and
(d) placing orders by a plurality of partitions or applications which cannot be overwritten or influenced respectively by other partitions or applications using a mechanism implemented in at least one hardware module or peripheral component.
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