US 12,222,803 B2
Intra-controllers for error correction code
Marco Sforzin, Cernusco Sul Naviglio (IT); and John D. Porter, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 29, 2023, as Appl. No. 18/216,254.
Claims priority of provisional application 63/357,527, filed on Jun. 30, 2022.
Prior Publication US 2024/0004751 A1, Jan. 4, 2024
Int. Cl. G06F 11/10 (2006.01)
CPC G06F 11/10 (2013.01) 20 Claims
OG exemplary drawing
 
8. A method, comprising:
performing, using first error correction information and prior to exchanging a respective portion of one or more user data blocks (UDBs) at a respective memory unit of a plurality of memory units, an error correction operation on the respective portion of one or more UDBs to correct one or more bit errors on the respective portion of one or more UDBs, wherein each memory unit of the plurality of memory units is configured to store:
the respective portion of one or more UDBs; and
auxiliary data comprising the first error correction information and error detection information to indicate one or more bit errors in the one or more UDBs; and
exchanging the respective portion of one or more UDBs and a portion of the auxiliary data including the error detection information subsequent to performing the error correction operation.