US 12,222,389 B2
Test board for testing memory signal
Honglong Shi, Hefei (CN); and Maosong Ma, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on May 6, 2022, as Appl. No. 17/662,368.
Claims priority of application No. 202111134623.4 (CN), filed on Sep. 27, 2021.
Prior Publication US 2023/0095908 A1, Mar. 30, 2023
Int. Cl. G01R 31/317 (2006.01)
CPC G01R 31/31713 (2013.01) 12 Claims
OG exemplary drawing
 
1. A test board for testing a memory signal, comprising a first surface and a second surface,
wherein the first surface of the test board comprises a raised region and a non raised region; wherein the raised region is provided with a first connection area connectable to a main board, and a level at which the non raised region is located is higher than a level at which the non raised region is located by a preset value;
wherein the second surface of the test board comprises a test area and a second connection area connectable to a memory chip;
wherein the test board is provided with a first connection harness for connecting the test area to the first connection area and a second connection harness for connecting the test area to the second connection area, to enable the memory signal of the memory chip to be tested based on the test area.