US 12,221,337 B2
Semiconductor MEMS structure
Yuan-Chih Hsieh, Hsinchu (TW); Hsing-Lien Lin, Hsinchu (TW); Jung-Huei Peng, Hsinchu (TW); and Yi-Chien Wu, Taichung (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu (TW)
Filed on Jul. 25, 2023, as Appl. No. 18/358,620.
Application 15/819,346 is a division of application No. 15/142,806, filed on Apr. 29, 2016, granted, now 9,828,234, issued on Nov. 28, 2017.
Application 18/358,620 is a continuation of application No. 16/948,641, filed on Sep. 25, 2020, granted, now 11,767,216.
Application 16/948,641 is a continuation of application No. 16/397,418, filed on Apr. 29, 2019, granted, now 10,787,360, issued on Sep. 29, 2020.
Application 16/397,418 is a continuation of application No. 15/819,346, filed on Nov. 21, 2017, granted, now 10,273,142, issued on Apr. 30, 2019.
Prior Publication US 2023/0365395 A1, Nov. 16, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/94 (2006.01); B81B 3/00 (2006.01); H01L 29/82 (2006.01)
CPC B81B 3/0005 (2013.01) [B81B 2201/0235 (2013.01); B81B 2201/0242 (2013.01); B81B 2203/04 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure, comprising:
a contiguous cavity enclosed by a first substrate and a second substrate opposite to the first substrate;
a feature within the contiguous cavity, the feature protruding into the contiguous cavity to a top surface of the feature;
a dielectric layer over the top surface of the feature and in the contiguous cavity; and
a layer over the dielectric layer and within the contiguous cavity, wherein the layer provides a hydrophobic surface exposed within the contiguous cavity.