US 12,219,889 B2
Semiconductor storage device
Masahiro Takahashi, Yokohama Kanagawa (JP); Yoshiaki Asao, Kawasaki Kanagawa (JP); Yukihiro Nomura, Taito Tokyo (JP); and Daisaburo Takashima, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Feb. 24, 2022, as Appl. No. 17/679,948.
Claims priority of application No. 2021-093747 (JP), filed on Jun. 3, 2021.
Prior Publication US 2022/0393106 A1, Dec. 8, 2022
Int. Cl. H10N 70/00 (2023.01); G11C 13/00 (2006.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01)
CPC H10N 70/8828 (2023.02) [G11C 13/004 (2013.01); G11C 13/0069 (2013.01); H10B 63/30 (2023.02); H10B 63/84 (2023.02); H10N 70/231 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor storage device comprising:
a memory cell including
a core portion that extends in a first direction above a semiconductor substrate;
a variable resistance layer that extends in the first direction and is in contact with the core portion;
a semiconductor layer that extends in the first direction and is in contact with the variable resistance layer;
a first insulator layer that extends in the first direction and is in contact with the semiconductor layer; and
a first voltage applying electrode that extends in a second direction orthogonal to the first direction and is in contact with the first insulator layer,
wherein the core portion is a vacuum region, and a degree of vacuum in the vacuum region is one of low vacuum, medium vacuum, high vacuum, and ultra-high vacuum.