| CPC H10N 70/841 (2023.02) | 13 Claims |

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1. A resistive memory device, comprising:
a stacked structure, the stacked structure comprising:
a first electrode;
a second electrode disposed above the first electrode in a vertical direction; and
a variable resistance layer disposed between the first electrode and the second electrode in the vertical direction; and
a copper via conductor structure disposed under the stacked structure, wherein the first electrode comprises a tantalum nitride layer and an electrically conductive layer disposed between the tantalum nitride layer and the variable resistance layer, the tantalum nitride layer is directly connected with the copper via conductor structure, and a material composition of the electrically conductive layer is different from a material composition of the tantalum nitride layer.
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