CPC H10N 50/01 (2023.02) [G11C 11/161 (2013.01); H10B 61/20 (2023.02); H10N 50/10 (2023.02); H10N 50/80 (2023.02)] | 20 Claims |
1. An integrated circuit device, comprising:
a bottom electrode contact;
a magnetic tunnel junction pattern over the bottom electrode contact;
a protection insulating layer surrounding the magnetic tunnel junction pattern;
a first capping layer surrounding the protection insulating layer;
an interlayer insulating layer surrounding the first capping layer; and
a second capping layer over the first capping layer and the interlayer insulating layer.
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