US 12,219,841 B2
Staggered and tile stacked microdevice integration and driving
Gholamreza Chaji, Waterloo (CA); Won Kyu Ha, Waterloo (CA); Aaron Daniel Trent Wiersma, Kitchener (CA); and Ehsanollah Fathi, Waterloo (CA)
Assigned to VueReal Inc., Waterloo (CA)
Filed by VueReal Inc., Waterloo (CA)
Filed on Dec. 14, 2020, as Appl. No. 17/121,688.
Application 17/121,688 is a division of application No. 16/546,929, filed on Aug. 21, 2019.
Claims priority of provisional application 62/809,163, filed on Feb. 22, 2019.
Claims priority of provisional application 62/823,350, filed on Mar. 25, 2019.
Prior Publication US 2021/0098562 A1, Apr. 1, 2021
Int. Cl. H10K 59/18 (2023.01); H01L 27/15 (2006.01); H01L 33/00 (2010.01); H01L 33/36 (2010.01); H01L 33/62 (2010.01); H10K 59/35 (2023.01)
CPC H10K 59/18 (2023.02) [H01L 27/156 (2013.01); H01L 33/0095 (2013.01); H01L 33/36 (2013.01); H01L 33/62 (2013.01); H10K 59/35 (2023.02); H10K 59/353 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A method of integrating microdevices comprising:
providing a first microdevice on a first donor substrate;
providing a second microdevice on a second donor substrate;
integrating the first microdevice from the first donor substrate to a first landing area on a system substrate;
after the integrating the first microdevice, and prior to providing one or more planarization layers around or over the first microdevice, forming one or more stages on a second landing area on the system substrate, wherein a height of the one or more stages is the same or higher than a height of the first microdevice; and
integrating the second microdevice from the second donor substrate to the one or more stages on the second landing area on the system substrate, wherein a top of the second microdevice is higher than a top of the first microdevice.