CPC H10K 59/131 (2023.02) [G06V 40/1318 (2022.01); H10K 59/353 (2023.02); H10K 59/65 (2023.02)] | 18 Claims |
1. A display panel comprising:
a substrate;
a first barrier layer on the substrate;
a lower pattern on the first barrier layer and having a mesh shape defining a disconnection area;
a second barrier layer on the first barrier layer, covering the lower pattern, and contacting the first barrier layer in the disconnection area;
a first active pattern on the second barrier layer and overlapping the lower pattern;
at least one gate electrode on the first active pattern and overlapping the lower pattern;
at least one first gate line on the first active pattern, extending in a first direction, and adjacent to a first side of the at least one gate electrode in a plan view;
a second active pattern on the first gate line;
at least one second gate line on the second active pattern, extending in the first direction, and adjacent to a second side of the at least one gate electrode in the plan view, wherein the second side is opposite the first side; and
at least one data line on the second gate line and extending in a second direction crossing the first direction.
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