US 12,219,829 B2
Display device
Nayun Kwak, Yongin-si (KR); Chulkyu Kang, Yongin-si (KR); Daesuk Kim, Yongin-si (KR); Ilgoo Youn, Yongin-si (KR); Dongsun Lee, Yongin-si (KR); Soyoung Lee, Yongin-si (KR); Jieun Lee, Yongin-si (KR); Junyoung Jo, Yongin-si (KR); and Minhee Choi, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Mar. 1, 2024, as Appl. No. 18/592,891.
Application 18/592,891 is a continuation of application No. 18/161,434, filed on Jan. 30, 2023, granted, now 11,950,460.
Application 18/161,434 is a continuation of application No. 17/085,288, filed on Oct. 30, 2020, granted, now 11,569,327, issued on Jan. 31, 2023.
Claims priority of application No. 10-2019-0160007 (KR), filed on Dec. 4, 2019.
Prior Publication US 2024/0206247 A1, Jun. 20, 2024
Int. Cl. G09G 3/3233 (2016.01); H01L 27/12 (2006.01); H10K 59/124 (2023.01); H10K 59/126 (2023.01); H10K 59/131 (2023.01)
CPC H10K 59/126 (2023.02) [G09G 3/3233 (2013.01); H01L 27/1237 (2013.01); H10K 59/124 (2023.02); H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display device comprising:
a first transistor including a first semiconductor layer, a first gate electrode and a second gate electrode;
a first shielding layer overlapping a portion of the first semiconductor layer, in a plan view;
a capacitor including a first capacitor electrode and a second capacitor electrode on the first capacitor electrode; and
a connection electrode connected to the first capacitor electrode and the first semiconductor layer,
wherein the first semiconductor layer comprises a source area, a drain area, a first channel area, a second channel area and a middle area, the middle area is between the first channel area and the second channel area,
wherein the first gate electrode overlaps the first channel area and the second gate electrode overlaps the second channel area in a plan view,
wherein the first shielding layer overlaps the middle area of the first semiconductor layer, and
wherein the connection electrode is connected to one of the source area and the drain area of the first semiconductor layer.