CPC H10K 59/1213 (2023.02) [H10K 59/131 (2023.02)] | 18 Claims |
1. A display device, comprising:
a substrate comprising a penetration area, a separation area, at least one non-display area, and a display area;
a light emitting element disposed in the display area on the substrate, the light emitting element including an organic light emitting layer;
a first thin film transistor and a second thin film transistor disposed in the display area, and a first source electrode and a first drain electrode of the first thin film transistor and a second source electrode and a second drain electrode of the second thin film transistor are on a same layer;
a first planarization layer disposed on the first source electrode and the first drain electrode of the first thin film transistor and the second source electrode and the second drain electrode of the second thin film transistor;
a connection electrode disposed on the first planarization layer;
a second planarization layer disposed on the first planarization layer and the connection electrode;
a separation structure located in the separation area, the separation structure disconnecting the organic light emitting layer of the light emitting element;
an unevenness pattern disposed below the separation structure, the unevenness pattern overlapping the separation structure, and
one or more intermediate layers between the separation structure and the unevenness pattern and at least one of the one or more intermediate layers overlapping a side surface of the unevenness pattern, wherein a height of a first portion of an upper surface of the one or more intermediate layers that is between the separation structure and the unevenness pattern with respect to the substrate is higher than a height of a second portion of the upper surface of the one or more intermediate layers that is not between the separation structure and the unevenness pattern with respect to the substrate,
wherein the unevenness pattern has a width that is less than a width of the separation structure,
wherein the one or more intermediate layers are made of an insulating material, and at least one of the one or more intermediate layers is in the display area and the separation area such that the at least one or more intermediate layers extends past an end of the separation structure in the separation area,
wherein the one or more intermediate layers include a first upper interlayer insulating layer disposed between the first thin film transistor and the second thin film transistor and extending to the separation area;
wherein the unevenness pattern is disposed below the first upper interlayer insulating layer in the separation area.
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