US 12,219,771 B2
Semiconductor device using oxide and method for manufacturing semiconductor device using oxide
Tatsuya Onuki, Atsugi (JP); Takanori Matsuzaki, Atsugi (JP); and Shunpei Yamazaki, Setagaya (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Appl. No. 17/621,334
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
PCT Filed Jun. 22, 2020, PCT No. PCT/IB2020/055843
§ 371(c)(1), (2) Date Dec. 21, 2021,
PCT Pub. No. WO2021/005432, PCT Pub. Date Jan. 14, 2021.
Claims priority of application No. 2019-125823 (JP), filed on Jul. 5, 2019.
Prior Publication US 2022/0320117 A1, Oct. 6, 2022
Int. Cl. H10B 43/35 (2023.01); H10B 41/35 (2023.01)
CPC H10B 43/35 (2023.02) [H10B 41/35 (2023.02)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a metal oxide;
a plurality of first conductors over the metal oxide;
a first insulator over the plurality of first conductors and comprising a plurality of openings overlapping with regions between the plurality of first conductors;
a plurality of second insulators in the respective plurality of openings;
a plurality of charge retention layers over the respective plurality of second insulators;
a plurality of third insulators over the respective plurality of charge retention layers; and
a plurality of second conductors over the respective plurality of third insulators,
wherein the plurality of second conductors overlap with the metal oxide with the respective plurality of second insulators, the respective plurality of charge retention layers, and the respective plurality of third insulators therebetween.