US 12,219,767 B2
Semiconductor device and method of manufacturing the same
Tomoya Sanuki, Yokkaichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Nov. 29, 2023, as Appl. No. 18/523,494.
Application 17/396,810 is a division of application No. 16/561,351, filed on Sep. 5, 2019, granted, now 11,127,717, issued on Sep. 21, 2021.
Application 18/523,494 is a continuation of application No. 17/396,810, filed on Aug. 9, 2021, granted, now 11,839,082.
Claims priority of application No. 2019-038710 (JP), filed on Mar. 4, 2019.
Prior Publication US 2024/0099004 A1, Mar. 21, 2024
Int. Cl. H10B 43/27 (2023.01); G11C 5/06 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01)
CPC H10B 43/27 (2023.02) [G11C 5/063 (2013.01); H01L 24/09 (2013.01); H01L 25/0657 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first substrate;
a first control circuit provided on the first substrate;
a bit line provided above the first control circuit;
a plurality of electrode layers stacked in a first direction, and provided above the bit line;
a first semiconductor layer provided above the plurality of electrode layers;
a columnar portion extending in the plurality of electrode layers in the first direction, and including a second semiconductor layer electrically connected to the bit line and the first semiconductor layer;
a third semiconductor layer above the plurality of electrode layers;
an opening penetrating the third semiconductor layer;
a first plug extending in the first direction, and electrically connected to the first control circuit; and
a metal conductive layer, which at least in part functions as a bonding pad, provided above the second semiconductor layer and the third semiconductor layer, and electrically connected to the first plug through the opening.