| CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/40 (2023.02)] | 20 Claims |

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1. A semiconductor chip, comprising:
a substrate;
a source structure disposed on the substrate;
a support pattern disposed on the source structure,
wherein each of the source structure and the support pattern comprises polysilicon;
an electrode structure disposed on the support pattern; and
a plurality of vertical structures extending vertically through the electrode structure,
wherein the electrode structure comprises:
a lower electrode structure disposed on the support pattern and comprising a plurality of lower gate electrodes and a plurality of first insulating films;
a second insulating film disposed on the lower electrode structure; and
an upper electrode structure disposed on the second insulating film and comprising a plurality of upper gate electrodes and a plurality of third insulating films,
wherein the vertical structures contact an upper surface of the source structure above the source structure.
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