US 12,219,692 B2
Printed circuit board
Dae Jung Byun, Suwon-si (KR); Jung Soo Kim, Suwon-si (KR); Sang Hyun Sim, Suwon-si (KR); Chang Min Ha, Suwon-si (KR); Tae Hong Min, Suwon-si (KR); and Jin Won Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on Nov. 22, 2023, as Appl. No. 18/517,393.
Application 18/517,393 is a division of application No. 17/124,893, filed on Dec. 17, 2020, granted, now 11,864,307.
Claims priority of application No. 10-2020-0123777 (KR), filed on Sep. 24, 2020.
Prior Publication US 2024/0090121 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H05K 1/02 (2006.01)
CPC H05K 1/0218 (2013.01) [H05K 1/024 (2013.01); H05K 1/0256 (2013.01); H05K 1/0298 (2013.01); H05K 2201/0141 (2013.01)] 7 Claims
OG exemplary drawing
 
6. A printed circuit board comprising: a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, and a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, wherein a dissipation factor of each insulating layer of the plurality of first insulating layers disposed in a region of the printed circuit board at one side of an interface of the first substrate portion and the second substrate portion is lower than a dissipation factor of each insulating layer of the plurality of second insulating layers disposed in another region of the printed circuit board at another side of the interface of the first substrate portion and the second substrate portion; at least one first wiring layer among the plurality of first wiring layers comprises a signal pattern, and at least one other first wiring layer among the plurality of first wiring layers comprises a ground pattern, wherein the at least one other first wiring layer including the ground pattern is disposed on a different level from the at least one first wiring layer including the signal pattern, and wherein the at least one other first wiring layer including the ground pattern is disposed on both sides of the at least one first wiring layer including the signal pattern.