| CPC H04M 1/72445 (2021.01) [G06F 9/451 (2018.02); G06F 16/958 (2019.01); H04M 1/72454 (2021.01); H04M 1/72457 (2021.01)] | 17 Claims |

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1. A system comprising:
at least one processor; and
a memory, wherein the memory is in communication with the at least one processor storing instructions that, when executed by the at least one processor, cause the at least one processor to:
receive a transition request from at least one client device;
wherein the transition request comprises:
a first interface page displayed on the at least one client device, and
at least one second interface page input data requirement for a second interface page to be displayed on the at least one client device;
determine the second interface page to be displayed on the at least one client device from a set of interface pages based at least in part on the first interface page and the at least one second interface page input data requirement;
generate, automatically and in response to the second interface page being unvalidated, a second interface page unit test for the second interface page to test at least one second interface page function of the second interface page based on the at least one second interface page input data requirement;
execute a current second interface page unit test against the second interface page to validate the at least one second interface page function of the second interface page before providing the second interface page to the at least one client device; and
transmit, based on the second interface page being validated by the current second interface page unit test, the second interface page to the at least one client device in response to the transition request for display on the at least one client device upon a transition from the first interface page.
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