| CPC H04L 63/166 (2013.01) [G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 18 Claims |

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1. A method for processing a full-stack network card task based on Field-Programmable Gate Array (FPGA), the method comprising:
receiving to-be-processed data, and offloading a Transmission Control Protocol (TCP)/Internet Protocol (IP) task from the to-be-processed data by a built-in TCP offload engine, to obtain first processed data;
offloading an Secure Sockets Layer (SSL)/Transport Layer Security (TLS) protocol task from the first processed data, to obtain second processed data; and
acquiring, by a host, dynamic configuration information of a Partial Reconfiguration (PR) region where the second processed data is located, and configuring the PR region based on the dynamic configuration information, so that the PR region offloads and processes computation-intensive tasks in the second processed data;
wherein the PR region is a neural network model or an image inference model.
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