US 12,218,863 B2
PUCCH Format 1 signal processing with reduced complexity and robust noise estimation
Sri Venkata Gautham Thasari, Bangalore (IN); and Aghil Vinayak Puzhakkal, Bangalore (IN)
Assigned to RAKUTEN SYMPHONY, INC., Tokyo (JP)
Appl. No. 18/041,799
Filed by RAKUTEN SYMPHONY, INC., Tokyo (JP)
PCT Filed Nov. 28, 2022, PCT No. PCT/US2022/051108
§ 371(c)(1), (2) Date Feb. 16, 2023,
PCT Pub. No. WO2024/118048, PCT Pub. Date Jun. 6, 2024.
Prior Publication US 2024/0275531 A1, Aug. 15, 2024
Int. Cl. H04L 5/00 (2006.01); H04L 27/26 (2006.01)
CPC H04L 5/0005 (2013.01) [H04L 27/26526 (2021.01)] 20 Claims
OG exemplary drawing
 
1. A network device, comprising:
receiver circuitry configured to receive a signal from a plurality of terminal devices, the signal received over a physical uplink control channel (PUCCH) format 1 (FMT1); and
a processor coupled to the receiver circuitry, and configured to:
perform processing on the received signal to obtain decoded data and signal-to-noise ratios (SNRs) corresponding to the plurality of terminal devices; and
utilize the decoded data and the SNRs for handling further communications with the plurality of terminal devices,
wherein, in the processing, the processor is configured to:
obtain, from the received signal, a time domain sequence, by performing a transform from a frequency domain into a time domain;
extract, from the time domain sequence,
noise blocks, and
one or more data blocks corresponding to each terminal device among the plurality of terminal devices; and
estimate a current noise power value based on
the extracted noise blocks, and
a previous noise power value.