| CPC H04L 25/0224 (2013.01) [H04L 25/022 (2013.01); H04L 27/2636 (2013.01)] | 20 Claims |

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1. An electronic device, comprising:
at least one processor; and
at least one memory operatively connected with the at least one processor, the at least one memory storing instructions, which when executed, instruct the at least one processor to:
perform frequency interpolation on a channel estimation at all resource elements (REs) located where a demodulation reference signal (DMRS) is transmitted;
perform time interpolation on a frequency domain interpolated channel obtained from the frequency interpolation; and
calculate an enhanced channel estimation based on channel estimates at REs in a frequency domain and REs in a time domain, the channel estimates being output from the time interpolation.
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