| CPC H04L 1/0057 (2013.01) [H04L 1/0047 (2013.01)] | 20 Claims |

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1. An apparatus comprising:
an encoder configured to generate a codeword composed of a plurality of bits by encoding source data; and
an interleaver configured to perform, on the codeword, a right triangle block-based interleaving, wherein
the interleaver is configured to:
divide the right triangle block into a reference sub-block and a plurality of sub-blocks, each of the plurality of sub-blocks having a sequential relationship with the reference sub-block,
generate reference input indices of the reference sub-block and first input indices of the plurality of sub-blocks, the first input indices being generated based on the sequential relationship and the reference input indices, and
store, in an internal memory, at least some of the plurality of bits according to the reference input indices and the first input indices.
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