CPC H04B 10/564 (2013.01) [H04B 10/516 (2013.01); H04B 10/616 (2013.01); H04L 1/0041 (2013.01)] | 20 Claims |
1. A digital signal processor, comprising:
forward error correction circuitry that provides encoded first electrical signals based on input data;
power adjusting circuitry that receives second electrical signals indicative of the first electrical signals, the power adjusting circuitry supplying third electrical signals, wherein each of the third electrical signals corresponds to an optical power level of a corresponding to one of a plurality of optical subcarriers output from an optical transmitter, wherein each of the third electrical signals has an associated one of a plurality of bandwidths, each of which corresponding to a spectral width of a respective one of the plurality of optical subcarriers;
a plurality of pulse shape filters corresponding to each of the third electrical signals, the plurality of pulse shape filters configured to shape the associated one of the plurality of bandwidths of the third electrical signals, each of which corresponding to a spectral width of a respective one of the plurality of optical subcarriers;
wherein each of the plurality of pulse shape filters is adjustable based on one or more control signal such that the shape of the plurality of bandwidths of the third electrical signals is adjustable.
|