US 12,218,670 B2
Flip-flops having strong transistors and weak transistors
I-Wen Wang, Hsinchu (TW); Po-Chih Cheng, Hsinchu (TW); Jia-Hong Gao, Hsinchu (TW); Kuang-Ching Chang, Hsinchu (TW); Tzu-Ying Lin, Hsinchu (TW); and Jerry Chang Jui Kao, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jun. 12, 2023, as Appl. No. 18/333,402.
Prior Publication US 2024/0413812 A1, Dec. 12, 2024
Int. Cl. H03K 3/3562 (2006.01)
CPC H03K 3/35625 (2013.01) 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a first clocked forwarding-switch and a second clocked forwarding-switch each implemented with strong transistors;
a first clocked inverter and a second clocked inverter each implemented with weak transistors, wherein an output of the first clocked forwarding-switch is conductively connected with an output of the first clocked inverter, and wherein an output of the second clocked forwarding-switch is conductively connected with an output of the second clocked inverter;
strong active-region structures extending in a first direction, wherein each of the strong active-region structures has a portion of the strong transistors;
weak active-region structures extending in the first direction, wherein each of the weak active-region structures has a portion of the weak transistors;
a first inverter having an input conductively connected to the output of the first clocked inverter and having an output conductively connected to an input of the first clocked inverter; and
a second inverter having an input conductively connected to the output of the second clocked inverter and having an output conductively connected to an input of the second clocked inverter.