US 12,218,660 B2
Power transistor circuit that generates internal voltage supply
Nan Xing, Allen, TX (US); Robert Wayne Mounger, Dallas, TX (US); Lucas Andrew Milner, Sunnyvale, CA (US); Krishnaswamy Nagaraj, Ashburn, VA (US); Sridhar Ramaswamy, Allen, TX (US); Yinglai Xia, Plano, TX (US); and Edward MacRobbie, Nepean (CA)
Assigned to Infineon Technologies Canada Inc., Ottawa (CA)
Filed by Infineon Technologies Canada Inc., Ottawa (CA)
Filed on Jun. 1, 2023, as Appl. No. 18/327,620.
Prior Publication US 2024/0405768 A1, Dec. 5, 2024
Int. Cl. G05F 1/46 (2006.01); H02M 3/07 (2006.01); H03K 17/687 (2006.01)
CPC H03K 17/687 (2013.01) [G05F 1/46 (2013.01); H02M 3/07 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A power transistor circuit configured to generate an internal voltage on an internal voltage supply node, the power transistor circuit comprising:
a first terminal;
a second terminal;
a third terminal;
a power transistor having a power transistor control node that is connected to the first terminal, a power transistor input node that is connected to the second terminal, and a power transistor output node that is connected to the third terminal, the power transistor structured such that a voltage applied to the power transistor control node controls whether or not current flows between the power transistor input node and the power transistor output node;
a first diode having a first diode anode and a first diode cathode, the first diode anode being connected to the power transistor control node and to the first terminal, the first diode cathode being connected to the internal voltage supply node;
a current draw transistor having a current draw transistor control node that controls whether current flows between a current draw transistor input node and a current draw transistor output node, the current draw transistor input node being connected to the power transistor input node and to the second terminal;
a second diode having a second diode anode and a second diode cathode, the second diode anode being connected to the current draw transistor output node, the second diode cathode being connected to the internal voltage supply node;
a capacitor being connected to the internal voltage supply node; and
a charge pump having a charge pump input node and a charge pump output node, the charge pump input node configured to, when powered, receive charge from the internal voltage supply node, pump the received charge to above a voltage of the internal voltage supply node, and output the pumped charge to the current draw transistor control node, the charge pump configured also to be powered from the internal voltage supply node when there is at least a minimum voltage present on the internal voltage supply node.