US 12,218,657 B2
Miller clamping device for parallel switching transistors and driver comprising same
Dongxin Jin, Shenzhen (CN); Huafen Ouyang, Shenzhen (CN); Lei Cao, Shenzhen (CN); Hualiang Li, Shenzhen (CN); and Dawei Zheng, Shenzhen (CN)
Assigned to SANTAK ELECTRONIC (SHENZHEN) CO., LTD., Shenzhen (CN)
Appl. No. 18/040,895
Filed by SANTAK ELECTRONIC (SHENZHEN) CO., LTD., Shenzhen (CN)
PCT Filed Sep. 3, 2021, PCT No. PCT/CN2021/116410
§ 371(c)(1), (2) Date Feb. 7, 2023,
PCT Pub. No. WO2022/048629, PCT Pub. Date Mar. 10, 2022.
Claims priority of application No. 202010921177.0 (CN), filed on Sep. 4, 2020.
Prior Publication US 2023/0291399 A1, Sep. 14, 2023
Int. Cl. H03K 17/16 (2006.01); H03K 3/017 (2006.01)
CPC H03K 17/162 (2013.01) [H03K 3/017 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a driver chip comprising an output terminal and a built-in clamping circuit with a clamping terminal, the output terminal of the driver chip being configured to output a pulse width modulation signal; and
a plurality of auxiliary clamping circuits, respective ones of the auxiliary clamping circuits being connected between gates of respective switching transistors and the clamping terminal of the built-in clamping circuit;
wherein when the built-in clamping circuit is triggered, a respective currents generated by the respective switching transistors flow through respective ones of the auxiliary clamping circuits.