US 12,218,606 B2
Power conversion device
Miwako Tanaka, Tokyo (JP); Toshiyuki Fujii, Tokyo (JP); Takuya Kajiyama, Tokyo (JP); and Akito Nakayama, Tokyo (JP)
Assigned to MITSUBISHI ELECTRIC CORPORATION, Tokyo (JP)
Appl. No. 18/276,274
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Apr. 5, 2021, PCT No. PCT/JP2021/014451
§ 371(c)(1), (2) Date Aug. 8, 2023,
PCT Pub. No. WO2022/215106, PCT Pub. Date Oct. 13, 2022.
Prior Publication US 2024/0128887 A1, Apr. 18, 2024
Int. Cl. H02M 7/483 (2007.01); H02M 1/00 (2006.01); H02M 1/084 (2006.01); H02M 1/12 (2006.01); H02M 1/32 (2007.01); H02M 7/00 (2006.01); H02M 7/155 (2006.01); H02M 7/19 (2006.01)
CPC H02M 7/1557 (2013.01) [H02M 1/009 (2021.05); H02M 1/084 (2013.01); H02M 1/123 (2021.05); H02M 1/32 (2013.01); H02M 7/003 (2013.01); H02M 7/19 (2013.01); H02M 7/4833 (2021.05); H02M 7/4835 (2021.05)] 20 Claims
OG exemplary drawing
 
1. A power conversion device comprising:
a power converter which performs power conversion between an AC grid with a plurality of phases and a DC grid; and
a control device which controls the power converter, wherein
the power converter includes leg circuits respectively corresponding to the plurality of phases of AC, the leg circuits each having a pair of a positive arm and a negative arm connected in series,
each of the positive arm and the negative arm includes one converter cell or a plurality of converter cells connected in series, the one or each converter cell including a series unit of a plurality of semiconductor switching elements connected in series and a DC capacitor connected in parallel to the series unit,
a connection point between the positive arm and the negative arm is connected to the AC grid, and the plurality of leg circuits are connected in parallel between positive and negative DC buses of the DC grid, and
the control device includes
a first voltage control circuitry which performs control so that a first representative value which is an average-value corresponding value of DC capacitor voltages of all the converter cells follows a predetermined overall voltage command value, to generate a first voltage command value,
a phase balance control circuitry which performs control so that a second representative value which is an average-value corresponding value of the DC capacitor voltages of the converter cells in the leg circuit for each phase follows the first representative value, to generate a second voltage command value,
a positive-negative balance control circuitry which performs control so that a deviation of third representative values which are average-value corresponding values of the DC capacitor voltages of the converter cells in the positive arm and the negative arm of the leg circuit for each phase becomes zero between the positive arm and the negative arm of the leg circuit for each phase, to generate a third voltage command value,
a voltage command value calculation circuitry which generates an arm modulation command for each arm on the basis of the first voltage command value, the second voltage command value, and the third voltage command value,
an individual balance control circuitry which performs control so that the DC capacitor voltages of all the converter cells follow the third representative values, to generate individual modulation commands for the respective converter cells, and
a gate signal generation circuitry which generates drive signals for the semiconductor switching elements on the basis of the arm modulation commands and the individual modulation commands.