US 12,218,593 B2
Half-bridge circuits with symmetrical layout of parallel transistors and capacitors
John S. Glaser, Niskayuna, NY (US); Yuanzhe Zhang, Torrance, CA (US); and Michael A. de Rooij, Playa Vista, CA (US)
Assigned to Efficient Power Conversion Corporation, El Segundo, CA (US)
Filed by Efficient Power Conversion Corporation, El Segundo, CA (US)
Filed on Sep. 12, 2022, as Appl. No. 17/942,803.
Claims priority of provisional application 63/243,462, filed on Sep. 13, 2021.
Prior Publication US 2023/0083279 A1, Mar. 16, 2023
Int. Cl. H02M 3/158 (2006.01); H02M 3/00 (2006.01)
CPC H02M 3/158 (2013.01) [H02M 3/003 (2021.05)] 9 Claims
OG exemplary drawing
 
1. A circuit board layout for a half-bridge circuit, comprising:
a high-side switch and a low-side switch disposed on a circuit board, wherein only one of the high-side switch and the low-side switch comprises two transistors connected in parallel and disposed on the circuit board in a symmetrical layout, and the other one of the high-side switch and low-side switch comprises a single transistor, and
two capacitors disposed on the circuit board in a symmetrical layout,
wherein each of the two transistors connected in parallel forms a power loop with the single transistor and one of the two capacitors, resulting in two power loops having substantially equal impedance due to the symmetrical layout of the two transistors and the two capacitors.