CPC H02M 1/4225 (2013.01) [G01R 19/02 (2013.01); H02M 7/2176 (2013.01); H02M 1/42 (2013.01); H02M 3/156 (2013.01); H02M 7/217 (2013.01)] | 20 Claims |
1. An apparatus comprising:
an arithmetic circuit including a first input, a second input, a third input, and an output;
an adder circuit including a first input, a second input, and an output, the first input of the adder circuit is coupled to the output of the arithmetic circuit, and the second input of the adder circuit is configured to receive a first voltage;
a root mean square (RMS) calculation circuit including:
an output coupled to the second input of the arithmetic circuit; and
an input configured to receive a second voltage; and
an input voltage square calculation circuit including:
an output coupled to the third input of the arithmetic circuit; and
an input configured to receive the second voltage.
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