US 12,218,542 B2
Voltage regulator for computing device
Donghwi Kim, Kirkland, WA (US); and Gregory Allen Nielsen, Kirkland, WA (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on Mar. 11, 2024, as Appl. No. 18/601,081.
Application 18/601,081 is a continuation of application No. 17/454,754, filed on Nov. 12, 2021, granted, now 11,936,230.
Claims priority of provisional application 63/261,010, filed on Sep. 8, 2021.
Prior Publication US 2024/0213793 A1, Jun. 27, 2024
Int. Cl. H02J 7/00 (2006.01); G06F 1/26 (2006.01); G06F 1/28 (2006.01); G06F 1/3212 (2019.01); G06F 1/3234 (2019.01); G06F 1/324 (2019.01); G06F 1/3296 (2019.01)
CPC H02J 7/00714 (2020.01) [G06F 1/28 (2013.01); H02J 7/0029 (2013.01); H02J 7/0047 (2013.01); H02J 7/0063 (2013.01); H02J 2207/20 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A computing device comprising:
a battery;
a processor configured to receive electrical power from the battery via a voltage regulator;
one or more additional electronic components configured to receive electrical power from the battery;
a first current detector configured to detect a total battery discharge current flowing from the battery to the processor via the voltage regulator and to the one or more additional electronic components, wherein the voltage regulator further includes a deglitching circuit;
wherein the voltage regulator is configured to:
receive a first analog current signal from the first current detector;
at the deglitching circuit, remove, from the first analog current signal, one or more overshoot components for which the total battery discharge current is greater than or equal to an available electric current limit for less than a deglitching timer duration, wherein the deglitching timer duration is longer than a current spike duration for which the processor is configured to operate at a warn-level current;
convert the first analog current signal, with overshoot components removed, into first digital current data; and
transmit the first digital current data to the processor,
wherein the processor is further configured to:
determine a difference between the total battery discharge current, as indicated by the first digital current data, and the available electric current limit for the battery; and
in response to at least determining the difference between the total battery discharge current and the available electric current limit, adjust one or more performance parameters of the processor such that the difference is reduced.