| CPC H01L 33/44 (2013.01) [H01L 25/0753 (2013.01)] | 16 Claims |

|
1. An array substrate, comprising a base substrate, an array layer, a passivation layer, and light-emitting components;
wherein the array layer is disposed over the base substrate and comprises a plurality of thin film transistors arranged in an array, the light-emitting components are disposed on one side of the array layer facing away from the base substrate; and
the passivation layer is disposed on the side of the array layer facing away from the base substrate, all portions of the passivation layer are arranged around lateral sides of the light-emitting components, and there is no part of the passivation layer over or below the light-emitting components, so that the passivation layer is reused as a reflective layer to directly reflect lateral light emitted from the light-emitting components, the passivation layer comprises a first dielectric layer, a second dielectric layer and a third dielectric layer stacked in sequence, the first dielectric layer is disposed close to the array layer, the third dielectric layer is disposed away from the array layer, a refractive index of the first dielectric layer is different from a refractive index of the second dielectric layer, and the refractive index of the second dielectric layer is different from a refractive index of the third dielectric layer;
wherein the first dielectric layer and the third dielectric layer are silicon nitride layers, the second dielectric layer is an amorphous silicon layer, a thickness of the first dielectric layer is 640-660 angstroms, a thickness of the second dielectric layer is 160-180 angstroms, and a thickness of the third dielectric layer is 600-1200 angstroms;
wherein the array substrate further comprises an indium tin oxide layer disposed on the passivation layer, the indium tin oxide layer and the array layer are located on opposite sides of the passivation layer; and the indium tin oxide layer is bonded to a chip in the array layer through a through hole defined on the passivation layer, all portions of the indium tin oxide layer are arranged around the lateral sides of the light-emitting components, and a thickness of the indium tin oxide layer is 480-520 angstroms.
|