CPC H01L 33/16 (2013.01) [H01L 33/0025 (2013.01); H01L 33/007 (2013.01); H01S 5/34333 (2013.01); H01L 33/32 (2013.01); H01S 5/3063 (2013.01); H01S 5/3425 (2013.01)] | 10 Claims |
1. A semiconductor apparatus, comprising:
a substrate;
a buffer layer on and in contact with the substrate;
an n-type semiconductor layer on and in contact with the buffer layer;
a light-emitting layer on and in contact with a first portion of the n-type semiconductor layer;
a first electrode on and in contact with a second portion of the n-type semiconductor layer and at least partially surrounding the light-emitting layer;
an electron block layer on and in contact with the light-emitting layer;
a p-type semiconductor layer on and in contact with the electron block layer, wherein:
the p-type semiconductor layer includes a plurality of unit semiconductor layers;
each of the plurality of unit semiconductor layers includes a p-type nitride semiconductor whose main surface is a polar surface or a semi-polar surface;
the p-type nitride semiconductor includes nitrogen and two or more elements; and
each of the plurality of unit semiconductor layers has a composition changing in a stacking direction;
a contact layer on and in contact with the p-type semiconductor layer;
a semi-transparent layer on and in contact with the contact layer; and
a second electrode on and in contact with a portion of the semi-transparent layer.
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