US 12,218,271 B2
Light emitting element
Shun Kitahama, Tokushima (JP); Yoshiki Inoue, Anan (JP); Kazuhiro Nagamine, Komatsushima (JP); and Junya Narita, Yoshinogawa (JP)
Assigned to NICHIA CORPORATION, Anan (JP)
Filed by NICHIA CORPORATION, Anan (JP)
Filed on Nov. 13, 2023, as Appl. No. 18/507,177.
Application 16/677,287 is a division of application No. 15/842,655, filed on Dec. 14, 2017, granted, now 10,505,072, issued on Dec. 10, 2019.
Application 18/507,177 is a continuation of application No. 17/338,446, filed on Jun. 3, 2021, granted, now 11,855,238.
Application 17/338,446 is a continuation of application No. 16/677,287, filed on Nov. 7, 2019, granted, now 11,056,612, issued on Jul. 6, 2021.
Claims priority of application No. 2016-243899 (JP), filed on Dec. 16, 2016; and application No. 2017-171833 (JP), filed on Sep. 7, 2017.
Prior Publication US 2024/0079517 A1, Mar. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 33/00 (2010.01); H01L 21/268 (2006.01); H01L 33/14 (2010.01); H01L 33/22 (2010.01); H01L 33/32 (2010.01); H01L 33/38 (2010.01); H01L 33/44 (2010.01)
CPC H01L 33/0095 (2013.01) [H01L 33/007 (2013.01); H01L 33/0075 (2013.01); H01L 33/145 (2013.01); H01L 33/32 (2013.01); H01L 33/382 (2013.01); H01L 33/44 (2013.01); H01L 21/268 (2013.01); H01L 33/22 (2013.01); H01L 2933/0025 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method for manufacturing a plurality of light emitting elements, the method comprising:
providing a semiconductor wafer comprising:
a substrate,
an n-side nitride semiconductor layer located on the substrate, and
a p-side nitride semiconductor layer located on the n-side nitride semiconductor layer;
forming a first protective layer in a lattice-shape on an upper face of the p-side nitride semiconductor layer;
irradiating a laser beam on portions of the substrate that are located directly under the first protective layer so as to form modified regions in the substrate; and
obtaining a plurality of light emitting elements by dividing the substrate in which the modified regions have been formed, the n-side nitride semiconductor layer, the p-side nitride semiconductor layer, and the first protective layer.