US 12,218,244 B2
Vertical transistor structures and methods utilizing selective formation
Mark I. Gardner, Albany, NY (US); H. Jim Fulford, Albany, NY (US); and Partha Mukhopadhyay, Albany, NY (US)
Assigned to TOKYO ELECTRON LIMITED, Tokyo (JP)
Filed by Tokyo Electron Limited, Tokyo (JP)
Filed on Nov. 17, 2021, as Appl. No. 17/529,051.
Claims priority of provisional application 63/219,508, filed on Jul. 8, 2021.
Prior Publication US 2023/0010879 A1, Jan. 12, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/786 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/78642 (2013.01) [H01L 27/092 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A vertical field effect transistor (VFET) structure comprising:
a stack of layers including:
a first layer stack including at least three first layers of at least one conductive material extending in the x-y plane separated in the z plane by one or more first layers of at least one dielectric material, the first layer stack associated with a first transistor structure; and
a second layer stack including at least three second layers of the at least one conductive material extending in the x-y plane separated in the z plane by one or more second layers of the at least one dielectric material, the second layer stack associated with a second transistor structure,
the first and second transistor structures separated by one or more dielectric materials;
a channel opening extending through the stack of layers along the z plane;
a first channel structure within the channel opening, the first channel structure comprising a semiconductive behaving oxide material and coupled to the at least three first layers of the first layer stack, wherein the first channel structure surrounds an insulating layer in the channel opening; and
a second channel structure within the channel opening, the second channel structure comprising a semiconductive behaving oxide material and coupled to the at least three second layers of the second layer stack, wherein the second channel structure surrounds the insulating layer in the channel opening and is separated apart from the first channel structure with the insulating layer.