US 12,218,237 B2
Semiconductor device, and method for manufacturing semiconductor device
Yuki Yanagisawa, Kanagawa (JP); and Takashi Futatsuki, Kagoshima (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/276,248
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Sep. 11, 2019, PCT No. PCT/JP2019/035702
§ 371(c)(1), (2) Date Mar. 15, 2021,
PCT Pub. No. WO2020/066625, PCT Pub. Date Apr. 2, 2020.
Claims priority of application No. 2018-185226 (JP), filed on Sep. 28, 2018.
Prior Publication US 2022/0029017 A1, Jan. 27, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 27/12 (2006.01); H01L 29/08 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7845 (2013.01) [H01L 27/1203 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/41725 (2013.01); H01L 29/4916 (2013.01); H01L 29/66477 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate in which a support substrate, an insulating film, and a semiconductor layer are laminated;
a gate insulating film provided on the semiconductor substrate;
a sidewall insulating film;
a gate electrode layer that is provided on the gate insulating film and contains impurity ions, wherein the gate electrode layer is formed in a multilayer structure, wherein at least one layer of the multilayer structure is formed of a polysilicon layer including phosphorus ions, and wherein the polysilicon layer is formed closest to the semiconductor layer; and
source or drain regions that are provided in the semiconductor substrate on both sides of the gate electrode layer and contain conductive impurities, wherein a concentration of the impurity ions in the gate electrode layer is higher than a concentration of the conductive impurities in the source or drain regions.